Class-D Power Amplifier
Content
Class-D Power
Amplifier
Senior Project
By
Joseph Maldonado
&
Jeovany Vega
Electrical Engineering Department
California Polytechnic State University
San Luis Obispo
2010
II
TABLE OF CONTENTS
Section
Page
Acknowledgements ..............................................................................................IV
I.
Introduction................................................................................................1
II.
Background.................................................................................................2
III.
Requirements..............................................................................................8
IV.
Design........................................................................................................15
V.
Construction..............................................................................................19
VI.
Testing.......................................................................................................20
VII.
Conclusions and Recommendations.........................................................23
VIII.
Bibliography………......................................................................................25
Appendices
A.
Schematic..................................................................................................26
B.
Parts List, Cost, and Time Schedule Allocation...................................26, 27
C.
Picture of completed Prototype...............................................................27
III
LIST OF TABLES AND FIGURES
Figure 1: Class A Amplifier Topology ........................................................................................ 3
Figure 2: Class B Amplifier Topology......................................................................................... 3
Figure 3: Class AB Amplifier Topology ...................................................................................... 4
Figure 4: Class C Amplifier Topology......................................................................................... 5
Figure 5: Class D Half-Bridge Topology [4] ................................................................................ 5
Figure 6: Class D Full-Bridge Topology [4]................................................................................. 6
Figure 7: Class E Amplifier Topology ......................................................................................... 7
Figure 8: Class F Amplifier Topology ......................................................................................... 7
Figure 9: PWM Circuit ............................................................................................................... 9
Figure 10: Graphical representation of a PWM signal generation ......................................... 10
Figure 11: Regions of Modulation........................................................................................... 10
Figure 12: Second Order Butterworth Low pass filter ............................................................ 12
Figure 13: Ferrite core vs Powder alloy core Saturation curves ............................................. 14
Figure 14: 555-Timer and Integrator, Triangle Wave Generator ............................................ 15
Figure 15: Sergio Franco’s Triangle Wave Oscillator............................................................... 16
Figure 16: XR-2206 Triangle Wave VCO [7] ............................................................................ 17
Figure 17: PWM comparators with variable dead time.......................................................... 18
Figure 18: Low-Pass Butterworth filter .................................................................................. 18
Figure 19: Complete Class D schematic .................................................................................. 19
Figure 20: Triangle Waveform ................................................................................................ 20
Figure 21: Pulse Width Modulated Signal............................................................................... 21
Figure 22: Pulse Width Modulation with Dead Time.............................................................. 22
Figure 23: Low-Pass Filter Response ....................................................................................... 23
IV
Acknowledgement
Jeovany Vega and Joseph Maldonado would like to thank all the Cal Poly, San
Luis Obispo, electrical engineering students for moral support and help on
troubleshooting circuits. We would also like to thanks to Vladimir Prodanov, our
advisor for this project who guided us and who made this project success.
1
I. INTRODUCTION
The goal of audio amplification in an audio system is to accurately reproduce and
amplify the given input signals. The biggest obstacle to overcome is to have high
output power with as least amount of power loss as possible. In today’s technologies
portable music devices are becoming more popular with a growing demand of
external sounds in portable music devices. If the audio amplifier is not efficient it will
deplete the device’s battery much sooner than desired. Audio amplification is
sometimes done with tube amplifier technology but these are bulky in size and not
desirable for portable electronics. For most audio amplification needs, engineers
choose to use transistors in linear mode to create a scaled output based on a small
input. This is not the best design for audio amplifiers because transistors in linear
operation will continuously conduct, generate heat, and consume power. This heat
loss is the main reason why linear mode is not optimal for battery operated portable
audio applications.
Human audible frequencies range from about 20 Hz to 20 kHz, but many people
cannot hear near the extremes. This range requires that any audio amplifier have a
good frequency response over the human audible range. To accurately reproducing
the audio input there should be no added harmonics, clipping or aliasing of the
original input signal in the amplified output. Some harmonics can be reduced or
eliminated by applying a low-pass filter before connecting the load. The way that we
are going to amplify a small audio input signal is with a Class D power amplifier.
2
II. BACKGROUND
There are many classes of audio amplifiers; A, B, AB, C, D, E and F. The different
classes are broken down into two different operating modes linear or switching.
Class A, B, AB and C are all linear mode amplifier that have an output that is
proportional to their input. Linear mod amplifiers do not saturate, fully turn on or
fully turn off. Since the transistors are always conducting, heat is generated and
continuously consuming power. This is the reason why linear amplifiers have lower
efficiency when compared to switching amplifiers.
Switching amplifiers are Class D, E and F. Switching amplifiers have higher
efficiency which theoretically should be 100%. This is because there is little to no
energy being loss to heat dissipation. Class D is a switching amplifier and when it is in
the “on” state it will conduct current but have almost no voltage across the
switches, therefore no heat is dissipated due to power consumption. When it is in
the “off” mode the supply voltage will be going across the MOSFETs but due to no
current flow the switch is not consuming any power. The amplifier will only consume
power during the on/off transitions if leakage currents are not taken into account.
The Class A amplifiers topology is shown in figure 1. This topology uses one
transistor as a dc current source configuration. This source is responsible for
supplying as much audio current as is required by the speaker. The quality of
amplification and sound reproduction is good but the power that is dissipated is
excessive because of the large dc bias current that is flowing in the output-stage of
the transistors and not to the speakers. Theoretically the maximum efficiency for a
Class A amplifier is 50%.
3
Figure 1: Class A Amplifier Topology
Figure 2 depicts the Class B amplifiers topology. Compared to Class A amplifier
the Class B amplifiers do not have the dc bias current and therefore consume
considerably less power. The output transistors in Class B topology are controlled
individually. That is when the high MOSFET is on it supplies positive current to the
speaker and when the low MOSFET is on it tries to sink negative currents. This is why
Class B amplifiers dissipate less power but in trade off with power we get mediocre
sound quality. Theoretically the maximum efficiency for a Class B amplifier is about
78.5%.
Figure 2: Class B Amplifier Topology
4
Class AB amplifiers topology is shown in figure 3.Its a hybrid of both Classes A
and B. It uses some DC bias current, less than that of the Class A design. The power
dissipation is typically closer to Class B but still not good enough for audio. This is
because the midrange output voltages are too far from either the positive or
negative supply rails, so the transistors are always conducting. There also needs to
be some sort of control to allow the Class AB circuit to supply or sink such large
output currents.
Figure 3: Class AB Amplifier Topology
Class C amplifiers, topology shown in figure 4, have zero idle bias current at the
output, which makes them similar to Class B. What makes Class C different from
Class B is that Class C has an area where the idle current is zero, which is more than
50% of the total supply voltage. Therefore there is even more distortion caused by
crossover of source and sink currents then in Class B. This distortion causes poor
sound quality and makes Class C amplifiers inadequate for audio applications.
Theoretically the maximum efficiency for a Class C amplifier is 100% at zero output
but 78.5% at full output.
5
2
L
C
1
M
Vdc
Vout
2
0
L
1
-Vdc
0
Figure 4: Class C Amplifier Topology
Class D amplifiers operate by switching between two states, “on” and “off”. The
“On” state is when there is current flowing through the device but, theoretically, no
voltage across the MOSFET. The “Off” state occurs when there is a voltage across
the MOSFET but no current flowing. There are two main topologies in Class D
amplifiers, half-bridge and full-bridge. Both are depicted in figures 5 and 6. Class D
amplifiers are the best choice when it comes to power dissipation consideration
because there is far less loss in power consumption when the MOSFETs are not
always in the “on” state. Theoretically the maximum efficiency for a Class D amplifier
is 100%.
Figure 5: Class D Half-Bridge Topology [4]
6
Figure 6: Class D Full-Bridge Topology [4]
The topology for a Class E is shown in figure 7. This class of amplifiers has a
pulsed input and an output that is tuned to a certain frequency. They are commonly
used in radio transmitters where the output is a single or narrow band of
frequencies. This is undesirable for audio applications because there is such a wide
range in audible frequencies. Therefore we would not be able to get the range of
audible frequencies using a Class E amplifier. Theoretically the maximum efficiency
for a Class E amplifier is 100%.
7
Figure 7: Class E Amplifier Topology
Class F amplifiers are used mainly in high frequency applications. A common
Class F topology is shown in figure 8. It is similar to the class C except that the Class F
has two or more circuits that are tuned. A Class F amplifier transmits below a certain
cutoff frequency and reflects above the cutoff frequency. There is only one
transistor in Class F topology and two load networks. This topology causes
harmonics to be replicated and is not suitable for accurate audio reproduction.
Theoretically the maximum efficiency for a Class F amplifier is 100%.
Figure 8: Class F Amplifier Topology
8
III. REQUIRMENTS
a) Triangle Wave Generator
In a Class-D amplifier design an accurate triangle wave signal is required to
achieve the pulse width signals. The generation of the triangle wave can be done
with the use of simple circuits which consist of a square wave generator and an
integrator which integrates the square wave to a triangle wave. Most of these
circuits consist of comparators and op-amps that can handle the required frequency
and not exceed their respective slew rates. More in-depth explanation on the
chosen circuit for the triangle wave generator is in the design part of the report. The
frequency of the triangle wave must be at least three times the switching frequency.
Having the triangle wave frequency at least two or three times greater will minimize
distortion from harmonics [3]. The output filters cutoff frequency plays an important
role in choosing the triangle wave frequency due to harmonic distortion that is
generated from the switching of the amplifier.
b) Pulse Width Modulation
Class-D amplifiers use pulse width modulation (PWM) to sample the audio signal.
With the use of a half-bridge or full-bridge design it amplifies the sampled pulse
train wave. The choice of sampling frequency is very critical to have an accurate
representation of the sampled audio signal. The audible audio signal frequency is
from 20 Hz to 20 kHz. Knowing this we have to choose a sample frequency that is at
least twice that of the audio signal due to the Nyquist Theorem. For low distortion a
factor of 5 to 50 times greater is used but due to chosen components the sampling
frequency was chosen to be 200 kHz. One thing to keep in mind is that as the
frequency is increased so are the losses in the MOSFET’s, due to their gate
9
capacitance. The trade-off is that the signal to noise ratio is reduced along with
reducing the output filtering requirements. Figure 9 shows the block diagram of how
the PWM signal is generated. The comparator is generating the PWM waveform; this
is accomplished by comparing the amplitudes of the triangle wave and the audio
signal. As shown in figure 10 a positive pulse is generated when the audio signal’s
magnitude is greater than the triangle wave; a negative pulse is generated when the
triangle wave’s amplitude is greater than the audio signal’s amplitude. The chosen
amplitude is an important factor that determines whether the compared signal will
be linear, over or under modulated.
The amplitude modulation index is calculated from the ratio of the audio signal
amplitude to the triangle wave amplitude. A modulation index between the values
of [0,1] will ensure linear modulation while an index greater than 1 will yield over
modulation and saturation and an index greater than 3.24 yields a square wave
modulation [6]. Figure 11 shows the three different regions of modulation according
to amplitude modulation index. The PWM signal and its compliment is what will
drive the gates of the MOSFET’s in the bridge configuration to control the signal the
speaker receives.
Figure 9: PWM Circuit [2]
10
Figure 10: Graphical representation of a PWM signal generation [2]
Figure 11: Regions of Modulation [5]
c) MOSFET’s
It’s very crucial to the design that the driver circuits produce signal that do not
overlap or else you run into the problem of shorting your supply straight to ground
11
or if using split supply shorting the supplies. This is better known as shoot through
but it can be reduced or prevented by introducing non-overlapping gate signals to
the MOSFETs. The non-overlapping time is better known as Dead time. In designing
these signals we must keep the dead time as short as possible to maintain an
accurate low-distortion output signal but must be long enough to maintain both
MOSFETs from conducting at the same time. The time that the MOSFETs are in
linear mode must also be reduced which will help insure that the MOSFETs are
working synchronously rather than both conducting at the same time. For this
application Power MOSFETs must be used due to the voltage and currents in the
design. The Class-D amplifiers are used for their high efficiency but MOSFETs have a
built in body diode that is parasitic and will allow the current to continue to
freewheel during dead time. A Schottky diode can be added in parallel to the drain
and source of the MOSFET to reduce the losses through the MOSFET. This reduces
its losses because the Schottky diode is faster than the body diode of the MOSFET
ensuring that the body diode does not conduct during dead time. To reduce the
losses due to high frequency a Schottky diode in parallel with the MOSFET is
practical and necessary. This Schottky ensure that the voltage across the MOFETs
before turning off. The overall operation of the MOSFETs and output stage is
analogous to the operation of a synchronous Buck converter.
d) Output Filter
The final stage of a Class-D is the output filter which attenuates and removes the
harmonics of the switching frequency. This can be done with a common low pass
filter topology but the most common is an inductor and capacitor combination. A 2nd
order filter is desired so that we have a -40dB/Decade roll-off. The range of cutoff
frequencies is between 20 kHz to about 50 kHz due to the fact that humans cannot
hear anything above 20 kHz. Figure 12 shows the second order Butterworth filter,
which is what we chose to design and implement. The main reason we choose a
12
Butterworth filter is because it requires the least amount of components and has a
flat response with a sharp cut off frequency.
Figure 12
12: Second Order Butterworth Low pass filter
The transfer functions of the Butterworth along with component design equation
are as follows:
The design equation for the required components are chosen from the below equations.
In the above equations fc is the cutoff frequency chosen by designer, L is the
inductor value, C is the capacitor value
value, and R is the resistive value
alue of the speaker
usually 4 or 8 ohms. The inductor and capacitor tolerances must be chosen to
withstand the high output voltage and current ratings. There are many different
types of inductors commercially available but the most commonly used are gapped
ferrite cores and powder alloy cores. TThey
hey each have their respective drawback and
13
advantages. Ferrite core inductors have an almost linear or flat saturation response
while powder alloy cores do not. Figure 13 shows the saturation curves for both the
powder alloy and ferrite core. Choosing the correct type of inductor is important so
that it does not saturate its core.
An electrolytic capacitor at the output is usually desired due to the fact that
electrolytic capacitors are cheap and physically small. The choice of dialectic class is
more important to pay attention to. A class 1 dielectric COG capacitor would be
ideal due to the fact that it will have a very stable temperature coefficient and make
it a more suitable for a Class-D amplifier application.
Figure 13: Ferrite Core vs Powder Alloy Core Saturation Curves [1]
14
IV. DESIGN
a) Triangle Wave Generator
The first attempt at designing a triangle wave, shown in figure 14, was using a
555-timer to create a square wave with 50% duty cycle and a frequency of 200 kHz
This was very difficult but we were able to get very close to 50%. Then we built an
integrator and put it on the output of the 555-timer. This was so that we could
integrate the square wave into a triangle wave at 200 kHz. We were unable to get
this to work properly. When we interfaced the two devices the 555-timers ground
lifted and the zero was too high for the integrator and we were unable to easily
correct this, so we moved on to another triangle wave design from Design with
Operational Amplifiers and Analog Integrated Circuits, 3rd edition by Sergio Franco.
V3
3.6k
1n
1u
1
C6
15Vdc
3
3
R7
+
V+
4
1k
TRIGGER
RESET OUTPUT
CONTROL
THRESHOLD
DISCHARGE
555D
C5
V4
R4
OUT
R9
2
1k
-
1
V-
R6
2
4
5
6
7
GND
2.5k
X1
VCC
R5
0
1k
11
8
15Vdc
R8
53k
0
C7
1n
Figure 14: 555-Timer and Integrator, Triangle Wave Generator
0
V5
15Vdc
15
Our Second attempt at a triangle wave is shown below in figure 15. After
constructing this we were able to see a square wave but were unable to see a
triangle wave output. This did not make sense because if we were able to see a
square wave we should be able to see the triangle wave at the output of the first
operational amplifiers. The triangle wave is an input to the square wave and sets the
frequency of the square wave. We were unsure why this was not able work.
R3
1k
4
V4
OUT
R1
1
3
+
V-
5k
2
200p
0
R2
1
V5
15k
-
15Vdc
V-
C1
OUT
11
-
11
2
4
+
V+
V+
3
15Vdc
D1
0
D2
Figure 15: Sergio Franco’s Triangle Wave Oscillator
Figure 16 is the circuit diagram of the Voltage controlled oscillator chosen to
generate the required triangle wave. Choosing the correct values for the timing
capacitor (C) and resistor (R) are determined by equations and figures from the
datasheets. A precise 200 kHz was needed for our project and by using the XR-2206
we got a precise triangle wave at 200 kHz that is variable with a potentiometer. This
method was much better than trying to design our own triangle wave. The only
problem we ran into with this chip is that the chip outputted a DC off-set triangle
wave. The audio signal required a level shift so that the triangle wave and audio
signal would be centered at the same DC point.
16
Figure 16: XR-2206 Triangle Wave VCO [7]
b) Pulse Width Modulation
Figure 17 depicts the circuit designed to generate the two non-overlapping
signals. The first sets of comparators are used for pulse width modulation by
comparing the triangle wave and the audio signal. The offset on one triangle wave is
to introduce dead time between the pulses and therefore neither MOSFET is on at
the same time. After the pulses we buffer and invert the signal so that it can be used
to power the MOSFETs gate.
17
Figure 17: PWM Comparators with Variable Dead Time
c) Output Stage
We figured out that the output voltage swing from the LM339 is sufficient to
drive the MOSFETs. From that we were able to choose appropriate MOSFET’s, so
that we did not have to build a circuit to drive the MOSFET’s. The output filter was
the same second order Butterworth filter that was described previously in the
requirements part of the report. The diagram for the MOSFET’s and the low-pass
Butterworth filter are shown below in figure 18.
Figure 18: Butterworth Filter with MOSFET’s
18
V. CONSTRUCTION
Figure 19 is the final constructed circuit but for complete pin out of final circuit
refer to appendix a. This diagram includes the triangle wave generator, PWM
circuit, MOSFET drivers and output filter. After working through all of our difficulties
in the design stages we had a fairly simple time constructing the circuit. The biggest
difficulty was choosing the appropriate components from the part available.
Figure 19: Complete Class D Schematic
19
VI. TESTING
a) Triangle Wave Generator
Figure 20 shows our triangle waveform captured from the oscilloscope. Our
triangle wave came out to have a Vpp of 7.76V and a frequency of 200 kHz. These
values were very close to what we simulated and more then we needed. Our Vpp
only needed to be around 7V. When we tested the audio signal the voltage seemed
to peak out around 3.5V.
Figure 20: Triangle Waveform
20
b) Pulse Width Modulation
Figure 21 shows one of the pulse width modulated signal. When the triangle
wave and the audio signal intersect a pulse is formed. Due to the delay of the
operational amplifier the pulse is offset from where the triangle and audio signal
intersect. The triangle in this figure is the actual triangle wave generated by the
XR2206 at 200 kHz.
Figure 21: Pulse Width Modulated Signal
c) Pulse Width Modulation with Dead Time
To avoid having simultaneous conduction of both NMOS’s a non-overlapping
pulse circuit had to be design with adjustable dead time. The non-overlapping pulses
were generated by comparing the audio signal to the generated triangle wave and
also to a DC offset triangle wave, which would introduce the desired dead time by
increasing the DC voltage. This gave us the two different pulses and has an
adjustable dead time, by adjusting the DC offset we are able to change the dead
21
time. Below in figure 22 are our non-overlapping pulse signals. These two nonoverlapping signals are what would be used to drive the MOSFET’s at the desired
frequency.
Figure 22: Pulse Width Modulation with Dead Time
c) Output Filter Stage
In figure 23 the scope capture represents the frequency response of the
designed output filter. The response was simulated by running a frequency sweep
with a function generator starting from 20 Hz to about 20 kHz. As shown the cutoff
frequency is at or around 20 kHz, which is around 1/6 of the original input. This is ok
because most people cannot hear over 18 kHz because of this there is very little
audio that will be playing at 20 kHz. From the oscilloscope capture and comparing
the amplitude of the signal we can deduce that the designed and implemented
Butterworth 2nd order Low pass filter has a cut off at around 20 kHz and is adequate
for this application.
22
Figure 23: Low-Pass Filter Response
23
VII. CONCLUSIONS AND RECOMMENDATIONS
In doing this project we thought we were picking something that was less time
consuming it seemed easy to just build and put this circuit together but we ran into
a lot of trouble because of how precise our components needed to be. One thing
that would have helped is doing more research into the scope of the project. In the
last few months of the quarter we finally decided to look at older students previous
senior projects and we saw that they were unable to complete them. Another
suggestion is to maybe start with an integrated chip that generates the required
triangle wave and then start the design of the circuit. As time passed the triangle
wave generation is what took up most of the time and would have been something
that could have been designed last. One thing that would have deceased time
trouble shooting and design time is to do more research on the components
required to make sure they meet the required specification. The comparators Slew
rates are an important thing to know and make sure it’s sufficient for the required
switching frequency. Lastly just like any project time is of the essence and the earlier
you start the better. The MOSFET driving by the comparators output was not tested
in this project but from the electrical specification and data sheet information the
outputs generated by the LM339 should theoretically be sufficient to drive the
MOSFETs.
24
VIII.
BIBLIOGRAPHY
[1] "Class D Audio Amplifier with Ferroxcube Gapped Toroid Output Filter."
Ferroxcube - Ferrite Cores, Bobbins & Accessories. Web. 13 May 2010.
[2] "Control Technologies Manual." Allen-Bradley. Web. 10 Sept. 2009.
<http://www.ab.com/drives/techpapers/PWMDrives01.pdf>.
[3] Leach, Marshall. "The Class D Amplifier." Georgia Tech. Web. 09 Oct. 2009.
<http://users.ece.gatech.edu/mleach/ece4435/f01/ClassD2.pdf>.
[4] Moreno, Sergio S. "Class-D Amplifiers." Elliott Sound Products - The Audio Pages
(Main Index). Ed. Rod Elliot. 04 June 2005. Web. 15 Nov. 2009.
<http://sound.westhost.com/articles/pwm.htm>.
[5] "Pulse Width Modulation Inverter Model." IEEE. Web. 25 Feb. 2010.
<http://ewh.ieee.org/soc/es/Nov1998/08/PWMINV.HTM>.
[6] Taufik. "Switched -Mode Inverters." Advanced Power Electronics. Print.
[7] "XR2206 -Monolithic Function Generator." EXAR Powering Connectivity. Web. 10
May 2010.
<http://www.exar.com/Common/Content/ProductDetails.aspx?ID=XR2206>.
25
IX. APPENDICES
a) Schematic
b) Parts List and Cost
PARTS
LM339
XR2206
TL081
LM337
47u Inductor
Proto-board
PC Board Terminals
PRICE
$1.49
$5.49
$1.00
$1.30
$2.67
$4.24
$3.98
Stand-offs
4 Ω Speaker
MOSFETS
Various Resistors
Various Capacitors
$1.99
$12.00
$1.90
$5.00
$5.00
26
b) Time Schedule Allocation
Expected time
Actual Time
1. Research
30 Hours
50 Hours
2. Design
30 Hours
50 Hours
3. Construction
15 Hours
20 Hours
4. Troubleshooting
15 Hours
60 Hours
5. Testing
20 Hours
30 Hours
4. Paper
40 Hours
60 Hours
Totals:
150 Hours
270 Hours
C) Picture of completed Prototype
Amplifier
Senior Project
By
Joseph Maldonado
&
Jeovany Vega
Electrical Engineering Department
California Polytechnic State University
San Luis Obispo
2010
II
TABLE OF CONTENTS
Section
Page
Acknowledgements ..............................................................................................IV
I.
Introduction................................................................................................1
II.
Background.................................................................................................2
III.
Requirements..............................................................................................8
IV.
Design........................................................................................................15
V.
Construction..............................................................................................19
VI.
Testing.......................................................................................................20
VII.
Conclusions and Recommendations.........................................................23
VIII.
Bibliography………......................................................................................25
Appendices
A.
Schematic..................................................................................................26
B.
Parts List, Cost, and Time Schedule Allocation...................................26, 27
C.
Picture of completed Prototype...............................................................27
III
LIST OF TABLES AND FIGURES
Figure 1: Class A Amplifier Topology ........................................................................................ 3
Figure 2: Class B Amplifier Topology......................................................................................... 3
Figure 3: Class AB Amplifier Topology ...................................................................................... 4
Figure 4: Class C Amplifier Topology......................................................................................... 5
Figure 5: Class D Half-Bridge Topology [4] ................................................................................ 5
Figure 6: Class D Full-Bridge Topology [4]................................................................................. 6
Figure 7: Class E Amplifier Topology ......................................................................................... 7
Figure 8: Class F Amplifier Topology ......................................................................................... 7
Figure 9: PWM Circuit ............................................................................................................... 9
Figure 10: Graphical representation of a PWM signal generation ......................................... 10
Figure 11: Regions of Modulation........................................................................................... 10
Figure 12: Second Order Butterworth Low pass filter ............................................................ 12
Figure 13: Ferrite core vs Powder alloy core Saturation curves ............................................. 14
Figure 14: 555-Timer and Integrator, Triangle Wave Generator ............................................ 15
Figure 15: Sergio Franco’s Triangle Wave Oscillator............................................................... 16
Figure 16: XR-2206 Triangle Wave VCO [7] ............................................................................ 17
Figure 17: PWM comparators with variable dead time.......................................................... 18
Figure 18: Low-Pass Butterworth filter .................................................................................. 18
Figure 19: Complete Class D schematic .................................................................................. 19
Figure 20: Triangle Waveform ................................................................................................ 20
Figure 21: Pulse Width Modulated Signal............................................................................... 21
Figure 22: Pulse Width Modulation with Dead Time.............................................................. 22
Figure 23: Low-Pass Filter Response ....................................................................................... 23
IV
Acknowledgement
Jeovany Vega and Joseph Maldonado would like to thank all the Cal Poly, San
Luis Obispo, electrical engineering students for moral support and help on
troubleshooting circuits. We would also like to thanks to Vladimir Prodanov, our
advisor for this project who guided us and who made this project success.
1
I. INTRODUCTION
The goal of audio amplification in an audio system is to accurately reproduce and
amplify the given input signals. The biggest obstacle to overcome is to have high
output power with as least amount of power loss as possible. In today’s technologies
portable music devices are becoming more popular with a growing demand of
external sounds in portable music devices. If the audio amplifier is not efficient it will
deplete the device’s battery much sooner than desired. Audio amplification is
sometimes done with tube amplifier technology but these are bulky in size and not
desirable for portable electronics. For most audio amplification needs, engineers
choose to use transistors in linear mode to create a scaled output based on a small
input. This is not the best design for audio amplifiers because transistors in linear
operation will continuously conduct, generate heat, and consume power. This heat
loss is the main reason why linear mode is not optimal for battery operated portable
audio applications.
Human audible frequencies range from about 20 Hz to 20 kHz, but many people
cannot hear near the extremes. This range requires that any audio amplifier have a
good frequency response over the human audible range. To accurately reproducing
the audio input there should be no added harmonics, clipping or aliasing of the
original input signal in the amplified output. Some harmonics can be reduced or
eliminated by applying a low-pass filter before connecting the load. The way that we
are going to amplify a small audio input signal is with a Class D power amplifier.
2
II. BACKGROUND
There are many classes of audio amplifiers; A, B, AB, C, D, E and F. The different
classes are broken down into two different operating modes linear or switching.
Class A, B, AB and C are all linear mode amplifier that have an output that is
proportional to their input. Linear mod amplifiers do not saturate, fully turn on or
fully turn off. Since the transistors are always conducting, heat is generated and
continuously consuming power. This is the reason why linear amplifiers have lower
efficiency when compared to switching amplifiers.
Switching amplifiers are Class D, E and F. Switching amplifiers have higher
efficiency which theoretically should be 100%. This is because there is little to no
energy being loss to heat dissipation. Class D is a switching amplifier and when it is in
the “on” state it will conduct current but have almost no voltage across the
switches, therefore no heat is dissipated due to power consumption. When it is in
the “off” mode the supply voltage will be going across the MOSFETs but due to no
current flow the switch is not consuming any power. The amplifier will only consume
power during the on/off transitions if leakage currents are not taken into account.
The Class A amplifiers topology is shown in figure 1. This topology uses one
transistor as a dc current source configuration. This source is responsible for
supplying as much audio current as is required by the speaker. The quality of
amplification and sound reproduction is good but the power that is dissipated is
excessive because of the large dc bias current that is flowing in the output-stage of
the transistors and not to the speakers. Theoretically the maximum efficiency for a
Class A amplifier is 50%.
3
Figure 1: Class A Amplifier Topology
Figure 2 depicts the Class B amplifiers topology. Compared to Class A amplifier
the Class B amplifiers do not have the dc bias current and therefore consume
considerably less power. The output transistors in Class B topology are controlled
individually. That is when the high MOSFET is on it supplies positive current to the
speaker and when the low MOSFET is on it tries to sink negative currents. This is why
Class B amplifiers dissipate less power but in trade off with power we get mediocre
sound quality. Theoretically the maximum efficiency for a Class B amplifier is about
78.5%.
Figure 2: Class B Amplifier Topology
4
Class AB amplifiers topology is shown in figure 3.Its a hybrid of both Classes A
and B. It uses some DC bias current, less than that of the Class A design. The power
dissipation is typically closer to Class B but still not good enough for audio. This is
because the midrange output voltages are too far from either the positive or
negative supply rails, so the transistors are always conducting. There also needs to
be some sort of control to allow the Class AB circuit to supply or sink such large
output currents.
Figure 3: Class AB Amplifier Topology
Class C amplifiers, topology shown in figure 4, have zero idle bias current at the
output, which makes them similar to Class B. What makes Class C different from
Class B is that Class C has an area where the idle current is zero, which is more than
50% of the total supply voltage. Therefore there is even more distortion caused by
crossover of source and sink currents then in Class B. This distortion causes poor
sound quality and makes Class C amplifiers inadequate for audio applications.
Theoretically the maximum efficiency for a Class C amplifier is 100% at zero output
but 78.5% at full output.
5
2
L
C
1
M
Vdc
Vout
2
0
L
1
-Vdc
0
Figure 4: Class C Amplifier Topology
Class D amplifiers operate by switching between two states, “on” and “off”. The
“On” state is when there is current flowing through the device but, theoretically, no
voltage across the MOSFET. The “Off” state occurs when there is a voltage across
the MOSFET but no current flowing. There are two main topologies in Class D
amplifiers, half-bridge and full-bridge. Both are depicted in figures 5 and 6. Class D
amplifiers are the best choice when it comes to power dissipation consideration
because there is far less loss in power consumption when the MOSFETs are not
always in the “on” state. Theoretically the maximum efficiency for a Class D amplifier
is 100%.
Figure 5: Class D Half-Bridge Topology [4]
6
Figure 6: Class D Full-Bridge Topology [4]
The topology for a Class E is shown in figure 7. This class of amplifiers has a
pulsed input and an output that is tuned to a certain frequency. They are commonly
used in radio transmitters where the output is a single or narrow band of
frequencies. This is undesirable for audio applications because there is such a wide
range in audible frequencies. Therefore we would not be able to get the range of
audible frequencies using a Class E amplifier. Theoretically the maximum efficiency
for a Class E amplifier is 100%.
7
Figure 7: Class E Amplifier Topology
Class F amplifiers are used mainly in high frequency applications. A common
Class F topology is shown in figure 8. It is similar to the class C except that the Class F
has two or more circuits that are tuned. A Class F amplifier transmits below a certain
cutoff frequency and reflects above the cutoff frequency. There is only one
transistor in Class F topology and two load networks. This topology causes
harmonics to be replicated and is not suitable for accurate audio reproduction.
Theoretically the maximum efficiency for a Class F amplifier is 100%.
Figure 8: Class F Amplifier Topology
8
III. REQUIRMENTS
a) Triangle Wave Generator
In a Class-D amplifier design an accurate triangle wave signal is required to
achieve the pulse width signals. The generation of the triangle wave can be done
with the use of simple circuits which consist of a square wave generator and an
integrator which integrates the square wave to a triangle wave. Most of these
circuits consist of comparators and op-amps that can handle the required frequency
and not exceed their respective slew rates. More in-depth explanation on the
chosen circuit for the triangle wave generator is in the design part of the report. The
frequency of the triangle wave must be at least three times the switching frequency.
Having the triangle wave frequency at least two or three times greater will minimize
distortion from harmonics [3]. The output filters cutoff frequency plays an important
role in choosing the triangle wave frequency due to harmonic distortion that is
generated from the switching of the amplifier.
b) Pulse Width Modulation
Class-D amplifiers use pulse width modulation (PWM) to sample the audio signal.
With the use of a half-bridge or full-bridge design it amplifies the sampled pulse
train wave. The choice of sampling frequency is very critical to have an accurate
representation of the sampled audio signal. The audible audio signal frequency is
from 20 Hz to 20 kHz. Knowing this we have to choose a sample frequency that is at
least twice that of the audio signal due to the Nyquist Theorem. For low distortion a
factor of 5 to 50 times greater is used but due to chosen components the sampling
frequency was chosen to be 200 kHz. One thing to keep in mind is that as the
frequency is increased so are the losses in the MOSFET’s, due to their gate
9
capacitance. The trade-off is that the signal to noise ratio is reduced along with
reducing the output filtering requirements. Figure 9 shows the block diagram of how
the PWM signal is generated. The comparator is generating the PWM waveform; this
is accomplished by comparing the amplitudes of the triangle wave and the audio
signal. As shown in figure 10 a positive pulse is generated when the audio signal’s
magnitude is greater than the triangle wave; a negative pulse is generated when the
triangle wave’s amplitude is greater than the audio signal’s amplitude. The chosen
amplitude is an important factor that determines whether the compared signal will
be linear, over or under modulated.
The amplitude modulation index is calculated from the ratio of the audio signal
amplitude to the triangle wave amplitude. A modulation index between the values
of [0,1] will ensure linear modulation while an index greater than 1 will yield over
modulation and saturation and an index greater than 3.24 yields a square wave
modulation [6]. Figure 11 shows the three different regions of modulation according
to amplitude modulation index. The PWM signal and its compliment is what will
drive the gates of the MOSFET’s in the bridge configuration to control the signal the
speaker receives.
Figure 9: PWM Circuit [2]
10
Figure 10: Graphical representation of a PWM signal generation [2]
Figure 11: Regions of Modulation [5]
c) MOSFET’s
It’s very crucial to the design that the driver circuits produce signal that do not
overlap or else you run into the problem of shorting your supply straight to ground
11
or if using split supply shorting the supplies. This is better known as shoot through
but it can be reduced or prevented by introducing non-overlapping gate signals to
the MOSFETs. The non-overlapping time is better known as Dead time. In designing
these signals we must keep the dead time as short as possible to maintain an
accurate low-distortion output signal but must be long enough to maintain both
MOSFETs from conducting at the same time. The time that the MOSFETs are in
linear mode must also be reduced which will help insure that the MOSFETs are
working synchronously rather than both conducting at the same time. For this
application Power MOSFETs must be used due to the voltage and currents in the
design. The Class-D amplifiers are used for their high efficiency but MOSFETs have a
built in body diode that is parasitic and will allow the current to continue to
freewheel during dead time. A Schottky diode can be added in parallel to the drain
and source of the MOSFET to reduce the losses through the MOSFET. This reduces
its losses because the Schottky diode is faster than the body diode of the MOSFET
ensuring that the body diode does not conduct during dead time. To reduce the
losses due to high frequency a Schottky diode in parallel with the MOSFET is
practical and necessary. This Schottky ensure that the voltage across the MOFETs
before turning off. The overall operation of the MOSFETs and output stage is
analogous to the operation of a synchronous Buck converter.
d) Output Filter
The final stage of a Class-D is the output filter which attenuates and removes the
harmonics of the switching frequency. This can be done with a common low pass
filter topology but the most common is an inductor and capacitor combination. A 2nd
order filter is desired so that we have a -40dB/Decade roll-off. The range of cutoff
frequencies is between 20 kHz to about 50 kHz due to the fact that humans cannot
hear anything above 20 kHz. Figure 12 shows the second order Butterworth filter,
which is what we chose to design and implement. The main reason we choose a
12
Butterworth filter is because it requires the least amount of components and has a
flat response with a sharp cut off frequency.
Figure 12
12: Second Order Butterworth Low pass filter
The transfer functions of the Butterworth along with component design equation
are as follows:
The design equation for the required components are chosen from the below equations.
In the above equations fc is the cutoff frequency chosen by designer, L is the
inductor value, C is the capacitor value
value, and R is the resistive value
alue of the speaker
usually 4 or 8 ohms. The inductor and capacitor tolerances must be chosen to
withstand the high output voltage and current ratings. There are many different
types of inductors commercially available but the most commonly used are gapped
ferrite cores and powder alloy cores. TThey
hey each have their respective drawback and
13
advantages. Ferrite core inductors have an almost linear or flat saturation response
while powder alloy cores do not. Figure 13 shows the saturation curves for both the
powder alloy and ferrite core. Choosing the correct type of inductor is important so
that it does not saturate its core.
An electrolytic capacitor at the output is usually desired due to the fact that
electrolytic capacitors are cheap and physically small. The choice of dialectic class is
more important to pay attention to. A class 1 dielectric COG capacitor would be
ideal due to the fact that it will have a very stable temperature coefficient and make
it a more suitable for a Class-D amplifier application.
Figure 13: Ferrite Core vs Powder Alloy Core Saturation Curves [1]
14
IV. DESIGN
a) Triangle Wave Generator
The first attempt at designing a triangle wave, shown in figure 14, was using a
555-timer to create a square wave with 50% duty cycle and a frequency of 200 kHz
This was very difficult but we were able to get very close to 50%. Then we built an
integrator and put it on the output of the 555-timer. This was so that we could
integrate the square wave into a triangle wave at 200 kHz. We were unable to get
this to work properly. When we interfaced the two devices the 555-timers ground
lifted and the zero was too high for the integrator and we were unable to easily
correct this, so we moved on to another triangle wave design from Design with
Operational Amplifiers and Analog Integrated Circuits, 3rd edition by Sergio Franco.
V3
3.6k
1n
1u
1
C6
15Vdc
3
3
R7
+
V+
4
1k
TRIGGER
RESET OUTPUT
CONTROL
THRESHOLD
DISCHARGE
555D
C5
V4
R4
OUT
R9
2
1k
-
1
V-
R6
2
4
5
6
7
GND
2.5k
X1
VCC
R5
0
1k
11
8
15Vdc
R8
53k
0
C7
1n
Figure 14: 555-Timer and Integrator, Triangle Wave Generator
0
V5
15Vdc
15
Our Second attempt at a triangle wave is shown below in figure 15. After
constructing this we were able to see a square wave but were unable to see a
triangle wave output. This did not make sense because if we were able to see a
square wave we should be able to see the triangle wave at the output of the first
operational amplifiers. The triangle wave is an input to the square wave and sets the
frequency of the square wave. We were unsure why this was not able work.
R3
1k
4
V4
OUT
R1
1
3
+
V-
5k
2
200p
0
R2
1
V5
15k
-
15Vdc
V-
C1
OUT
11
-
11
2
4
+
V+
V+
3
15Vdc
D1
0
D2
Figure 15: Sergio Franco’s Triangle Wave Oscillator
Figure 16 is the circuit diagram of the Voltage controlled oscillator chosen to
generate the required triangle wave. Choosing the correct values for the timing
capacitor (C) and resistor (R) are determined by equations and figures from the
datasheets. A precise 200 kHz was needed for our project and by using the XR-2206
we got a precise triangle wave at 200 kHz that is variable with a potentiometer. This
method was much better than trying to design our own triangle wave. The only
problem we ran into with this chip is that the chip outputted a DC off-set triangle
wave. The audio signal required a level shift so that the triangle wave and audio
signal would be centered at the same DC point.
16
Figure 16: XR-2206 Triangle Wave VCO [7]
b) Pulse Width Modulation
Figure 17 depicts the circuit designed to generate the two non-overlapping
signals. The first sets of comparators are used for pulse width modulation by
comparing the triangle wave and the audio signal. The offset on one triangle wave is
to introduce dead time between the pulses and therefore neither MOSFET is on at
the same time. After the pulses we buffer and invert the signal so that it can be used
to power the MOSFETs gate.
17
Figure 17: PWM Comparators with Variable Dead Time
c) Output Stage
We figured out that the output voltage swing from the LM339 is sufficient to
drive the MOSFETs. From that we were able to choose appropriate MOSFET’s, so
that we did not have to build a circuit to drive the MOSFET’s. The output filter was
the same second order Butterworth filter that was described previously in the
requirements part of the report. The diagram for the MOSFET’s and the low-pass
Butterworth filter are shown below in figure 18.
Figure 18: Butterworth Filter with MOSFET’s
18
V. CONSTRUCTION
Figure 19 is the final constructed circuit but for complete pin out of final circuit
refer to appendix a. This diagram includes the triangle wave generator, PWM
circuit, MOSFET drivers and output filter. After working through all of our difficulties
in the design stages we had a fairly simple time constructing the circuit. The biggest
difficulty was choosing the appropriate components from the part available.
Figure 19: Complete Class D Schematic
19
VI. TESTING
a) Triangle Wave Generator
Figure 20 shows our triangle waveform captured from the oscilloscope. Our
triangle wave came out to have a Vpp of 7.76V and a frequency of 200 kHz. These
values were very close to what we simulated and more then we needed. Our Vpp
only needed to be around 7V. When we tested the audio signal the voltage seemed
to peak out around 3.5V.
Figure 20: Triangle Waveform
20
b) Pulse Width Modulation
Figure 21 shows one of the pulse width modulated signal. When the triangle
wave and the audio signal intersect a pulse is formed. Due to the delay of the
operational amplifier the pulse is offset from where the triangle and audio signal
intersect. The triangle in this figure is the actual triangle wave generated by the
XR2206 at 200 kHz.
Figure 21: Pulse Width Modulated Signal
c) Pulse Width Modulation with Dead Time
To avoid having simultaneous conduction of both NMOS’s a non-overlapping
pulse circuit had to be design with adjustable dead time. The non-overlapping pulses
were generated by comparing the audio signal to the generated triangle wave and
also to a DC offset triangle wave, which would introduce the desired dead time by
increasing the DC voltage. This gave us the two different pulses and has an
adjustable dead time, by adjusting the DC offset we are able to change the dead
21
time. Below in figure 22 are our non-overlapping pulse signals. These two nonoverlapping signals are what would be used to drive the MOSFET’s at the desired
frequency.
Figure 22: Pulse Width Modulation with Dead Time
c) Output Filter Stage
In figure 23 the scope capture represents the frequency response of the
designed output filter. The response was simulated by running a frequency sweep
with a function generator starting from 20 Hz to about 20 kHz. As shown the cutoff
frequency is at or around 20 kHz, which is around 1/6 of the original input. This is ok
because most people cannot hear over 18 kHz because of this there is very little
audio that will be playing at 20 kHz. From the oscilloscope capture and comparing
the amplitude of the signal we can deduce that the designed and implemented
Butterworth 2nd order Low pass filter has a cut off at around 20 kHz and is adequate
for this application.
22
Figure 23: Low-Pass Filter Response
23
VII. CONCLUSIONS AND RECOMMENDATIONS
In doing this project we thought we were picking something that was less time
consuming it seemed easy to just build and put this circuit together but we ran into
a lot of trouble because of how precise our components needed to be. One thing
that would have helped is doing more research into the scope of the project. In the
last few months of the quarter we finally decided to look at older students previous
senior projects and we saw that they were unable to complete them. Another
suggestion is to maybe start with an integrated chip that generates the required
triangle wave and then start the design of the circuit. As time passed the triangle
wave generation is what took up most of the time and would have been something
that could have been designed last. One thing that would have deceased time
trouble shooting and design time is to do more research on the components
required to make sure they meet the required specification. The comparators Slew
rates are an important thing to know and make sure it’s sufficient for the required
switching frequency. Lastly just like any project time is of the essence and the earlier
you start the better. The MOSFET driving by the comparators output was not tested
in this project but from the electrical specification and data sheet information the
outputs generated by the LM339 should theoretically be sufficient to drive the
MOSFETs.
24
VIII.
BIBLIOGRAPHY
[1] "Class D Audio Amplifier with Ferroxcube Gapped Toroid Output Filter."
Ferroxcube - Ferrite Cores, Bobbins & Accessories. Web. 13 May 2010.
[2] "Control Technologies Manual." Allen-Bradley. Web. 10 Sept. 2009.
<http://www.ab.com/drives/techpapers/PWMDrives01.pdf>.
[3] Leach, Marshall. "The Class D Amplifier." Georgia Tech. Web. 09 Oct. 2009.
<http://users.ece.gatech.edu/mleach/ece4435/f01/ClassD2.pdf>.
[4] Moreno, Sergio S. "Class-D Amplifiers." Elliott Sound Products - The Audio Pages
(Main Index). Ed. Rod Elliot. 04 June 2005. Web. 15 Nov. 2009.
<http://sound.westhost.com/articles/pwm.htm>.
[5] "Pulse Width Modulation Inverter Model." IEEE. Web. 25 Feb. 2010.
<http://ewh.ieee.org/soc/es/Nov1998/08/PWMINV.HTM>.
[6] Taufik. "Switched -Mode Inverters." Advanced Power Electronics. Print.
[7] "XR2206 -Monolithic Function Generator." EXAR Powering Connectivity. Web. 10
May 2010.
<http://www.exar.com/Common/Content/ProductDetails.aspx?ID=XR2206>.
25
IX. APPENDICES
a) Schematic
b) Parts List and Cost
PARTS
LM339
XR2206
TL081
LM337
47u Inductor
Proto-board
PC Board Terminals
PRICE
$1.49
$5.49
$1.00
$1.30
$2.67
$4.24
$3.98
Stand-offs
4 Ω Speaker
MOSFETS
Various Resistors
Various Capacitors
$1.99
$12.00
$1.90
$5.00
$5.00
26
b) Time Schedule Allocation
Expected time
Actual Time
1. Research
30 Hours
50 Hours
2. Design
30 Hours
50 Hours
3. Construction
15 Hours
20 Hours
4. Troubleshooting
15 Hours
60 Hours
5. Testing
20 Hours
30 Hours
4. Paper
40 Hours
60 Hours
Totals:
150 Hours
270 Hours
C) Picture of completed Prototype
